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As per MII standards, your PHY chip will have basic mode control register at address 0x00. Look in PHY chip datasheet under 'PHY MDIO register Description'. In U-Boot either phy-chip driver ( example marvell, vitesse etc.) if found, otherwise generic phy-driver will perform the phy reset. Nov 05, 2020 · Introduction CN913x based devices use ATF (ARM Trusted Firmware) for the first stage of booting, wrapping a secondary image such as a U-Boot. Currently mv-ddr-marvell and atf are taken from the mainline, however, u-boot and mrvl_scp_bl2.img are still not public and must be taken from marvell SDK10, or get the...

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